• Xilinx - Senior Design Verification Engineer - UVM/AXI/NoC/HBM/DDR4 Jobs in Hyderabad,India - 23787132

  • Xilinx
  • Save Job
  • 8 - 14 Years
  • Posted : above 1 month

Job Description:



Verification group is looking for someone with below experience

- Requires proven track record in technical leadership

- This includes planning, execution, tracking, verification closure, and delivery to programs

- Requires strong experience with development of UVM, OVM, VMM and/or Verilog, SystemVerilog test benches for full chip testbench and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test full chip FPGA fabric and SoCs

- Requires strong understanding of state of the art of verification techniques, including assertion and metric-driven verification

- Verification experience in MathEngine/DSP optimized for wireless applications, AXI, NoC, HBM, DDR4, PCIe verificationis a plus

- Verification experience in full chip verification is a plus

- Familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management is a plus

- Strong understanding of different phases of ASIC and/or full custom chip development is required

- Experience in modeling SystemC and using SystemC based models in verification is a plus

- Experience with FPGA programming and software is a plus

- Verification experience in PCIe, Processors, Graphics is a plus

- Experience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan) is a plus

- Experience with gate-level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus

- Some DFX/DFT and UPF/ power-aware - simulation experience is a plus

Profile Summary:

Employment Type : Full Time
Salary : Not Mentioned
Deadline : 11th Apr 2020

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