Job Description:

The candidate will be involved in any of the following activities

  • Behavioural modelling of analog component of semiconductor IP & SoC using Verilog AMS

  • Integrate with the models of digital subsystem to get the hetrogenous virtual platforms

  • Co- simulation of analog and digital models

Desired Skills and Experience

  • 1 - 6 Years of experience in Behavioral modelling using Verilog- AMS

  • Strong expertise in HDL language Verilog- AMS, Verilog, VHDL

  • Strong knowledge of mixed signal simulation

  • Ability to work well with cross functional teams

Preferred Expertise

  • Exposure to System Verilog, UVM, SystemC- AMS, SystemC, UVM, UVM- SystemC

  • Experience in automotive domain will be preferred


Profile Summary:

Employment Type : Full Time
Industry : IT - Software
Salary : Not Disclosed
Deadline : 09th May 2020

Key Skills:

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