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  • 4 - 6 Years
  • Posted : above 1 month

Job Description:

Requirements Sound understanding of functional verification fundamentals encompassing state machine verification , complex protocol verification , functional test strategies , directed and stress test generation , verification infrastructures and verification and / or debug flows In depth knowledge of System Verilog and verification methodologies like OVM , UVM working experience on the UART , PCIe , AVALON Interface , AXI , FPGA environment Working knowledge of modern PC architecture; Specific IO architecture knowledge and Low power verification is a plus Expert in programming and / or scripting (C++ , Perl and others) and be conversant with flows and tools for VLSI logic design and / or functional verification Good knowledge on functional and code coverage Educational Qualification BS / MS EE , EC , or CS Notice Period 3 - 4week,

Profile Summary:

Employment Type : Full Time
Salary : Not Disclosed
Deadline : 11th Mar 2020

Key Skills:

Company Profile:

Fabelizer Inc
Fabelizer Inc

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