• Verification Engineer - System Verilog/UVM Jobs in Bangalore,India

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Job Description:

SOC Verification Engineer

Qualification BE/BTech, ME/MTech ( VLSI Domain )

- Development of verification plans

- Verification environments

- Test cases and ensuring coverage and performance goals are achieved for IP and SOC level

- Working Knowledge of ARM processors

- HVLs/Tools System Verilog, UVM - Universal Verification Methodology, C language

Domain

- Networking, Memory DDR2/3/4, Ethernet PCIe,

- IP Verification Engineer

Qualification BE/BTech, ME/MTech ( VLSI Domain )

- Strong System Verilog or Specman expertise OVM/UVM/eRM expertise highly desired

- Good knowledge of protocols

- Ability and desire to learn new methodologies, languages, protocols etc

Profile Summary:

Employment Type : Full Time
Salary : Not Mentioned
Deadline : 16th Mar 2020

Key Skills:

Company Profile:

Not Mentioned

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