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  • 4 - 8 Years
  • Posted : above 1 month

Job Description:

- Good Knowledge about IO Layout, should have work experience on 28nm (Below 28nm is highly preferable)

- Good Working Experience on Cadence Virtuoso LE/XL, Calibre/Assura/Hercules DRC, LVS

- Good Understanding of ESD/Antenna/Latch up/EM effects and their implementation in Layout Design

- Sound knowledge of IO blocks like Design of the Transmitter /Receiver Blocks, Level Shifters

- Exposure to DDR IOs, XTAL IOs an added advantage

- Very Good CMOS fundamental

- Good Communication Skill

- Skill/Perl programming knowledge is an added advantage

Qualification Any Engineering Degree or equivalent practical experience

Profile Summary:

Employment Type : Full Time
Salary : Not Mentioned
Deadline : 06th May 2020

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