Sr Staff Physical Design / CAD flow & Methodology Engineer Jobs in United States Of America - 25056015

Job Description:

Sr Staff Physical Design/CAD flow & Methodology Engineer - 75715 Location Santa Clara, California, US

Company Advanced Micro Devices

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center

Developing great technology takes more than talent it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world If you have this type of passion, we invite you to take a look at the opportunities available to come join our team

THE ROLE

This person will work with global Front-End design team and physical design team for large scale ASIC chip physical implementation

They will have the opportunity to work on methodology development and flows for efficient design execution and achieve better PPA

If you like to identify complex technical problems, break them down, summarize multiple possible solutions, and lead the team in the right direction then youve found the right position

THE PERSON

The person would be a dedicated and hardworking team player that has excellent working knowledge of Physical design EDA tools and experience on CAD tools from Synopsys, Cadence and Mentor Graphics

As a team lead engineer, you would be responsible for giving technology direction and have the Ability to provide mentorship and guidance to junior and senior engineers, and be an effective team player

Excellence in Scripting and developing flows using in perl/tcl/python programming languages

Good understanding of Unix/Linux environment

KEY RESPONSIBILITIES

Technical lead of five to eight senior level engineers
Tasks to include RTL Synthesis, Placement, Clock tree synthesis, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off
Identify complex technical problems, break them down, summarize multiple possible solutions, and lead the team in the right direction
Drive and hands-on flow development and scripting
Technical and schedule discussion with multi-site engineers and managers
Knowledge of large scale / advanced process / ASIC chip physical design
Knowledgeable in all aspects of deep submicron ASIC design flow
The individual is expected to have deep understanding of VLSI design process technology and programming skills

PREFERRED EXPERIENCE

Design from RTL to GDSII

Excellent analytical and problem solving skills along with attention to details
Strong RTL analysis skills including Verilog, Timing Analysis and library understanding
Hands on experience in taping out 14nm, 16nm, 20nm, 28nm, 32nm, and/or 40nm SOC
Working experience on CAD tools from Synopsys, Cadence and Mentor Graphics
Strong communication, Time Management, and Presentation Skills
Must be a self-starter, and be able to independently and efficiently drive tasks to completion

ACADEMIC CREDENTIALS

Deep experience with BSEE/BSCS or 5 years of MSEE or MSCE in ASIC Physical Design

LOCATION

Santa Clara, CA

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AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law EOE/MFDV

Requisition Number 75715
Country United States State California City Santa Clara
Job Function [[customString7]]

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services AMD and its subsidiaries are equal opportunity employers We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status Please click here for more information

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