• United States Of America, Usa
  • Save Job
  • 1 - 3 Years
  • Posted : above 1 month

Job Description:

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology In-depth understanding of the ASIC design flow to tapeout including all aspects of Synthesis, Auto Placement and Routing, DFT Scan implementation, Clock Tree implementation, Static Timing Analysis, Logic Equivalence Checking, DRC, LVS, DFM, parasitic extraction flows
Chip level floorplan and integration planning and execution
Creation and management of partitions for soft macros including development of SDC
Work on design closure including timing, power, noise, and physical verification
Candidate should have exposure to current nanometer CMOS process technology, ASIC design flow and design methodology challenges and configuration/data management
Architect and develop efficient tools flows and automation around flows as needed

Were doing work that matters Help us solve what others cant

Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : Telecom, IT-Hardware/Networking
Functional Area : IT Hardware : Hardware Products & Services
Role : Hardware Design
Salary : As per Industry Standards
Deadline : 16th Mar 2020

Key Skills:

Company Profile:

Cadence Design Systems India Pvt Ltdarfix

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