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Job Description:

Senior Design Engineer


- Through understanding of digital design, RTL coding and simulation

- Involved in architectural and micro architecture design

- Experienced in Lint, CDC, logic synthesis, formal verification and static timing analysis

- Worked with physical design team for layout implementation

- Familiar with low power methodology and flow

- Capable of debugging EDA tool issues or design related issues

- Knowledge in DFT is must

- Good script language skill using Tcl, Perl and/or Awk

- Protocol knowledge and experience in SAS/SATA, PCI-Express, serial peripherals is plus


- Bachelor degree in Electronics or Electrical Engineering minimum

- 6 to 10 years of experience in VLSI / RTL design

- Masters Degree in Electronics or Electrical Engineering or equivalent (preferred)

- Highly self-motivated, well organized and result oriented

- Experience with Cadence Design Environment is an asset

Profile Summary:

Employment Type : Full Time
Salary : Not Mentioned
Deadline : 15th Mar 2020

Key Skills:

Company Profile:

Not Mentioned

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