• United States Of America, Usa
  • Save Job
  • 5 - 8 Years
  • Posted : above 1 month

Job Description:

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology We are looking for a motivated R&D engineer to help develop Cadences Verification Acceleration and Co-Emulation environment The engineer will be a part of a small team of highly experienced individuals in developing maintainable, high quality C/C code for a HDL language based compiler and runtime support Responsibilities include development and implementation of compiler optimizations and transformations for high-level RTL and behavioral synthesis with runtime support The candidate should be familiar with sound software engineering practices and comfortable working with large existing code base to develop new functionality

Requirements and Qualifications

BS / MS in Computer Science or equivalent required
A minimum of 5 years of software development experience
Proficient with C/C and gdb
A firm foundation in data structures and algorithms
Knowledge of System Verilog, RTL design or behavioral modeling
Good problem solving abilities
Good writing and communication skills
Ability to work in multi-site/multi-person projects
Experience with compiler development or optimizations is preferred
Experience with industry emulation solutions and/or simulation environments using industry leading RTL simulators is preferred

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Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : Telecom, IT-Hardware/Networking
Functional Area : IT Software : Software Products & Services
Role : Software Engineer
Salary : As per Industry Standards
Deadline : 20th Jan 2020

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