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  • 2 - 5 Years
  • Posted : above 1 month

Job Description:

Our client is one of the largest providers of 8, 16 & 32-bit microcontrollers

Job Responsibility

Companys CAD Physical Design (PD) team in Bangalore is looking for an Engineer-II to work on Full Chip and Block APR/Physical Implementation (Netlist to- GDSII) In this role, you will be working as part of a worldwide team in all areas of Physical Implementation including APR of hierarchical, low power, multi-mode, multi-corner mixed-signal designs

Requirements

Qualified applicants will possess the following experience

- Hands on experience in some aspects of design flow such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance and physical verification

- Basic knowledge of place and route methodologies

- Experience in block level/full chip Physical Design activities

- Basic Knowledge on VLSI and basic Knowledge on Timing

- Hands on Experience in areas of physical verification (DRC/LVS/ERC/ANT) using Calibre or equivalent

- Experience with 65nm, 40nm or 28nm technologies

- Proficiency in Tcl and Perl scripting is essential

- Hands on Experience in ICC, Innovus or equivalent

- Experience on PrimeTime, StarRC-XT, Formality, Redhawk or equivalent will be preferred

- Excellent written and verbal communication skills required

- Self-motivated team player with strong problem-solving skills that can collaborate with various teams to achieve design goals

- Experience 2-5 years of experience in Physical Design

- Education Masters/Bachelors Degree in Electrical / Electronics Engineering

Profile Summary:

Employment Type : Full Time
Salary : Not Mentioned
Deadline : 11th Apr 2020

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