• Mixed Signal Digital Design Leader Jobs in Malaysia - 25033249

  • Microchip Technology India Pvt Ltd
  • Malaysia

Job Description:

Company Description Microchip Technology Inc is a leading provider of embedded control applications Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM) We also license Flash-IP solutions that are incorporated in a broad range of products



About the Job

The Mixed Signal Development Group (MSDG) is responsible for delivering analog and mixed-signal IP to divisions within Microsemi We work with leading edge CMOS processes to produce analog integrated circuits for wireline and RF applications From T1/E1 to DDR to 56Gb/s SERDES, we enable technology that allows Microsemis products to interface to the outside world

As a member of the Mixed-Signal Development Group, the candidate will be supervised by a team leader/manager, and be engaged in the design digital circuits that integrate our PLLs, high speed SERDES, integrated filters, ADCs, DACs, and other analog building blocks

The digital content of this IP is increasing as we move to 28nm and smaller geometries Mid-Level level candidates are required to manage and deliver this digital content Some of the tasks will include specification/design/verification of digital blocks, co-design of mixed-signal blocks with internal analog design team, co-design of DSP blocks with internal DSP team, and development of DDR interfaces Assisting with the integration of externally purchased IP will also be required

The Mixed Signal Development Group looking to grow our design group within Microsemis Penang facilities We are seeking an individual with both design and verification experience to expand this group

Responsibilities

Read and understand engineering documents for digital blocks and mixed-signal systems

Architecture and RTL coding of high-speed digital circuits, modeling of analog blocks

Developing Testbenches and Verification Components such as UVCs, models, BFMs, and Re-usable Verification Environments

Writing, Modifying, and Maintaining Random and Directed Test Cases and Libraries in SystemVerilog/UVM

Writing block level Verilog/System-Verilog directed test-benches and supporting verification team with debug

Analyzing Functional, Code, and Test Plan Coverage

Implementing Assertions, Checkers, and Monitors

Defining place and route constraints, supporting place-and-route team to debug STA issues

Communicate regularly with other design and verification teams across the corporation

Interact with other groups within the company Validation, Production, FW, Product Development, Applications

Mentor and coach junior design engineers, if and when required

Occasional travel to Canada to gather project requirements

Job Requirements

Qualifications

This position requires at least BSEE with over 8-10 years of SOC/digital/mixed-signal development experience Candidates are required to have expertise in a wide range of areas in design, tools and flows

BSc/MSc in EE or equivalent with the completion of several complex ASIC or IC tapeouts in VDSM process technology nodes

Work experience 8-10 years of ASIC development experience

Strong working knowledge in one or more of the following disciplines; SystemVerilog, UVM, OVM, VMM

Experience in designing and verifying mixed signal SoC

Previous experience in Writing/Implementing/Reviewing Test Plans

Previous experience with SystemVerilog Assertions (SVA), Constrained Random Verification, and Functional coverage

Advantageous to have either design, verification or protocol knowledge of high performance bus protocols such AXI, AHB, and/or DDR

Experience with design tools as nc-sim, simvision & primetime/goldtime, specman

Experience in automation and scriptings such as Python/Perl/TCL/Shell

Prior experience on a product that has shipped in significant quantity

Experience with all phases of ASIC design (Specification, RTL, verification, synthesis, layout, DFT, etc)

Successful track record in project work

Excellent verbal and written communication skills Strong interpersonal skills

Ability to work efficiently with multi-site teams

Ability to track down bugs and technical problems and work with the design team to ensure timely resolution

Ability to read and understand applicable communication protocol standards

Comfort within the Unix/Linux O/S Environment

Experience with C/C or Matlab [an asset]

Experience with Specman verification language (for legacy projects) [an asset]

Experience with DSP design or DSP design implementation [an asset]

Experience with designs at 28nm and lower technologies [an asset]

Experience with different SERDES protocols including PCIe, SAS/SATA, OTN, Ethernet, etc [an asset]

Experience with customer interaction and support experience [an asset]

Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : Telecom, IT-Hardware/Networking
Functional Area : IT Hardware : Hardware Products & Services
Role : Hardware Design
Salary : As per Industry Standards
Deadline : 09th May 2020

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