• United Kingdom, Uk
  • Save Job
  • 5 - 8 Years
  • Posted : above 1 month

Job Description:

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology DFT Engineer needed to join ASIC design team Responsibilities include DFT insertion on RTL and gate level netlists, DFT verification, pattern generation, and pattern verification Experience in DFT techniques including scan test, at-speed scan, MBIST, JTAG, IEEE-1500, and memory repair required Experience with Cadence Genus and Modus tools preferred Minimum requirements MSEE and 5 years experience in DFT design

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Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : Telecom, IT-Hardware/Networking
Functional Area : IT Hardware : Hardware Products & Services
Role : Hardware Design
Salary : As per Industry Standards
Deadline : 23rd Jan 2020

Key Skills:

Company Profile:

Cadence Design Systems India Pvt Ltdarfix

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