• Engineer I / II - Mixed Signal Verification Jobs in Chennai,India - 24952575

  • Microchip Technology India Pvt Ltd
  • Save Job
  • 2 - 5 Years
  • Posted : above 1 month

Job Description:

Company Description Microchip Technology Inc is a leading provider of embedded control applications Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM) We also license Flash-IP solutions that are incorporated in a broad range of products

About the Job

The Mixed Signal Development Group (MSDG) is responsible for delivering analog and mixed-signal IP to divisions within Microchip We work with leading edge CMOS processes to produce analog integrated circuits for wireline and RF applications From T1/E1 to DDR to 56Gb/s SERDES, we enable technology that allows Microchips products to interface to the outside world

As a member of the Mixed-Signal Development Group, the candidate will be engaged in the verification of digital circuits that integrate our PLLs, high speed SERDES, integrated filters, ADCs, DACs, and other analog building blocks

The digital content of this IP is increasing as we move to 16nm and smaller geometries Candidates with verification (UVM) experience are required in our Penang mixed signal team to help deliver this digital content Tasks will include verification of digital blocks, verification of mixed-signal blocks, verification of DSP blocks, and verification of DDR interfaces Verification of externally purchased IP may also be required


Read and understand specification documents for digital blocks and mixed-signal systems
Developing Testbenches and Verification Components such as UVCs, models, BFMs, and re-usable verification environments
Writing, modifying, and maintaining random and directed test cases and libraries in SystemVerilog/UVM
Writing block level Verilog/System-Verilog directed test-benches and supporting verification team with debug
Analyzing functional, code, and test plan coverage
Implementing assertions, checkers, and monitors
Communicate regularly with other design and verification teams across the corporation
Interact with other groups within the company Validation, Production, FW, Product Development, Applications
Mentor and coach junior verification and design engineers, interns, contractors (as appropriate)
Assisting with the architecture and RTL coding of high-speed digital circuits, modeling of analog blocks may be required
Occasional travel to Canada to gather project requirements may be required

Job Requirements


This position requires at least BSEE with over 2 years of SOC/digital/mixed-signal verification experience including UVM It is an asset if the candidate has experience in a wide range of areas in verification, design, tools, and flows

BSc/MSc in EE or equivalent with the completion of several complex ASIC or IC tapeouts in VDSM process technology nodes
Work experience 2 years of ASIC development experience
Strong working knowledge in one or more of the following disciplines; SystemVerilog, UVM, OVM, VMM
Experience in designing and verifying mixed signal SoC
Previous experience in writing/implementing/reviewing test plans
Previous experience with SystemVerilog assertions (SVA), constrained random verification, and functional coverage
Advantageous to have either design, verification or protocol knowledge of high performance bus protocols such AXI, AHB, and/or DDR
Experience with design tools as ncsim, simvision & primetime/tempus
Experience in automation and scripting with languages such as Python/Perl/TCL/Shell
Prior experience on a product that has shipped in significant quantity
Experience with all phases of ASIC design (Specification, RTL, verification, synthesis, layout, DFT, etc) is an asset
Successful track record in project work
Excellent verbal and written communication skills Strong interpersonal skills
Ability to work efficiently with multi-site teams
Ability to track down bugs and technical problems and work with the design team to ensure timely resolution
Ability to read and understand applicable communication protocol standards
Comfort within the Unix/Linux O/S Environment
Experience with C/C or Matlab [an asset]
Experience with Specman verification language (for legacy projects) [an asset]
Experience with DSP design or DSP design implementation [an asset]
Experience with designs at 16nm and lower technologies [an asset]
Experience with different SERDES protocols including PCIe, SAS/SATA, OTN, Ethernet, etc [an asset]
Experience with customer interaction and support experience [an asset]

Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : Telecom, IT-Hardware/Networking
Functional Area : IT Hardware : Hardware Products & Services
Role : Hardware Design
Salary : As per Industry Standards
Deadline : 06th May 2020

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