• Analog Layout Engineer Jobs in Jaipur,India

  • CRPL - INDIA
  • Save Job
  • 4 - 8 Years
  • Posted : above 1 month

Job Description:

Wonderful opportunity to work on the Custom Layout of various Analog blocks of high speed SERDES He/she would also be asked to perform physical verification (eg DRC/LVS/Latchup/Antenna) and work closely with other Design and Layout Engineers

Industry
Semiconductors / Electronics

functional Area
IT Software - Embedded, EDA, VLSI, ASIC, Chip Design

Job Role
Team Lead/Technical Lead

Keyword
DRC LVS Analog Layout Physical Verification ir drop

Job Type
Permanent

Qualification

UG Qulification
Any Graduate - Any Specialization

PG Qulification
Any Post Graduate - Any Specialization

Doctorate
Doctorate Not Required - None

Desired Candidate Profile

1 Experienced in layout of high speed analog blocks including ADC/ DAC/ TX/ RX / PLL 2 Tools Virtuoso Layout Editor (L and XL), Calibre, Assura 3 DRC/LVS/Antenna/LPE Checks 4 Latest CMOS process 16FF, 10FF 5 Excellent communication

Profile Summary:

Employment Type : Full Time
Eligibility : Any Graduate
Industry : IT-Hardware/Networking
Functional Area : IT Hardware : Hardware Products & Services
Role : Hardware Design
Salary : As per Industry Standards
Deadline : 03rd Mar 2020

Key Skills:

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